PCB Layer Stackup Technology and Terminology

PCB Layer Stackup Technology and Terminology

 

PCB technology of MAD PCB has been driven not only by the quest for smaller electronic products, a leading driver of PCB technology has also been the quest for more compact components to use in those products. A limiting factor in how small a component can be made is the challenge of providing access to the component interconnects, or pins, which were traditionally arranged around the edges of the component. The greatest jump in the density of the interconnection came with the introduction of grid array interconnects - where the component's connection points are arranged in rows along the bottom surface of the component. Component packages, such as PGA (Pin Grid Array) and BGA (Ball Grid Array) use this arrangement of interconnects.

 

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Example: the internal structure of a Ball Grid Array package.

 

Within the component, the silicon die may still presents its connection points around the edge of the die, so these die connection points must be internally routed to the grid array of interconnections on the bottom of the PGA or BGA package. This is often done using an internal PCB, and it is this internal PCB that has driven much of the High Density Interconnect (HDI) technology development that is now available for use in the broader printed circuit board design and fabrication market.

 

The key technologies that have moved from component packaging technology into the broader PCB design area include:

 

Name

Description

Fine line features and clearances

Tracks/clearances down to 100µm (0.1mm or 4mil) are considered standard for PCB fabrication today, the current technology limit available in component packaging is around 10µm.

Blind via

A via that starts on a surface layer, but does not continue all the way through the board. Typically a blind via descends 1 layer, down to the next copper layer.

Buried via

A via that is starts on one internal layer and ends on another internal layer, but does not reach a surface copper layer.

Microvia

Defined as a via that has a hole diameter smaller than 6 mils (150µm). Microvias can be photo imaged, mechanically drilled, or laser drilled. Laser drilled microvias are an essential High Density Interconnect (HDI) technology, as they allow vias to be placed within a component pad, and when used as part of a buildup fabrication process, allow signal layer transitions without the need for short tracks (referred to as via stubs), greatly reducing via-induced signal integrity issues.

Core

A rigid laminate (often FR-4) with copper foil on both sides.

Prepreg

A glass-fiber cloth impregnated with thermosetting epoxy (resin+hardener) which is only partially cured.

Double-sided board

A board that has 2 copper layers, one on either side of an insulating core. All holes are through holes, that is they pass all the way from one side of the board to the other.

Multilayer board

A board that has multiple copper layers, ranging from 4 to over 30. A multilayer board can be fabricated in different ways, normally either: as a set of thin, double sided boards that are stacked (separated by prepreg) and laminated into a single structure under heat and pressure. In this type of multilayer board the holes can be all the way through the board (through-hole), blind or buried. Note that only specific layers can be mechanically drilled to create the buried vias, as they are simply through holes drilled in the thin double sided boards before the lamination process. Alternatively, a multilayer board is fabricated as just described, and then additional layers are laminated onto either side. This approach is used when the design demands the use of microvias, embedded components or rigid-flex technology. Alternative names are used to more accurately describe the different approaches to fabricating a multilayer board, as described below.

Sequential Lamination

The name given to the technique of creating a multilayer PCB which includes mechanically drilled buried vias (drilled in the thin, double-sided boards prior to final lamination).

Surface Laminar Circuit (SLC)

Starts as a multilayer core, with build-up layers added on either side (typically 1 to 4). The common notation used to describe the finished board is Build-up copper layers + Core copper layers + Build-up copper layers. For example, 2+4+2 describes a board with a 4 layer core, with 2 layers laminated on either side (also written as 2-4-2). This technology allows blind vias to be created during the build-up process, and discrete or formed components to be embedded.

Sequential layer Build-Up (SBU)

Starts as a core (double sided or an insulator), with conductive and dielectric layers formed one after the other (using multiple pressure passes), on both sides of the board. This technology also allows blind vias to be created during the build-up process, and discrete or formed components to be embedded. Also referred to as High Density Interconnect (HDI) technology.

High Density Interconnect (HDI)

High Density Interconnect technology, a PCB that has a higher wiring density per unit area than a conventional PCB. This is achieved using fine line features and clearances, microvias, buried vias and sequential lamination technologies. This name is also used as an alternative to Sequential layer Build-Up (SBU).


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