SOIC is the abbreviations of Small Outline Integrated Circuit, which is a surface mounting IC package. The standard form is a flat rectangular body, with leads extending from two sides. The leads are formed in a gull wing shape to allow solid footing during assembly to a PCB. Standard Pb-free lead finish on these packages is Matte Tin Plating. The convention for naming the package is SOIC or SO followed by the number of pins. For example, a 14-pin 4011 would be housed in an SOIC-14 or SO-14 package.
Thermally enhanced SOICs are offered with an exposed die pad. The exposed pad is no the bottom of the SOIC and acts as a ground connection and/or a heat sink for the package. The pad can be soldered to the PCB to dissipate heat. This type of package is also available with an improved die attach technology to achieve low thermal resistance. The enhanced SOIC is designed for products with high power and high current requirements.
General PCB Pad Guidelines with SOIC
SOICs are offered in industry standard sizes and thicknesses with various options of lead quantity and pitch. Proper PCB footprint and stencil designs are critical to ensure high surface mount assembly yields, and electrical and mechanical
performance of the mounted package. The design starts with obtaining the correct package drawing. Some general guidelines for SOIC footprints are:
- Lead foot should be approximately centered on the pad with equal pad extension from the toe and the foot
- Typically, the pad is extended 0.5 mm beyond the SOIC foot at both the heel and the toe
- Care should be taken that PCB pads do not extend under the SOIC body, which can cause issues in assembly
- Pad width should be approximately 60% of the lead pitch. Example: design 0.60mm pad width for a 1.27mm lead pitch
- Pitch must be designed in metric using the exact dimensions of 0.65 mm and 1.27 mm
Thermal/Electrical Pad Guidelines with SOIC
Exposed pad SOIC packages are thermally/electrically enhanced lead frame technology based. The bottom of the package provides the primary heat removal path as well as excellent electrical grounding to the PCB. The die attach paddle is down-set withing the package such that pad is exposed during the mold process. To optimize thermal performance, the PCB design should include a thermal plane.
Although the land pattern design for enhanced power lead attachment on the PCB should be the same as that for conventional, non-thermally/electrically enhanced packages, extra features are required during the PCB design and PCB assembly stage for effectively mounting thermally/electrically enhanced packages. In addition, repair and rework of assembled packages may involve some extra steps, depending upon the current rework practice withing the company.
Spacing between PCB PADs for Leads and Exposed Pad
In order to maximize both removal of heat from the package and electrical performance, a land pattern must be incorporated on the PCB within the footprint of the package corresponding to the exposed metal pad or exposed heat slug on the package. The size of the land pattern can be larger, smaller, or even take on a different shape than the exposed pad on the package. However, the solderable area, as defined by the solder mask, should be at least the same size/shape as the exposed pad area on the package to maximize the thermal/electrical performance. A clearance of at least 0.25mm should be designed on the PCB between the outer edges of the land pattern and the inner edges of leads pad pattern to avoid any shorts.
See Chip Package, IC, SOJ, SOP, TSOP, SSOP, TSSOP, QSOP and VSOP. Turnkey PCB assembly with components sourcing service at MADPCB.