What’s Chip Scale Package (CSP)?
A Chip Scale Package, or Chip-Scale Package (CSP) is a type of integrated circuit (IC) packages.
Originally, CSP was the acronym for Chip-Size Packaging. Since only a few packages are chip size, the meaning of the acronym was adapted to chip-scale packaging. According to IPC’s standard J-STD-012, Implementation of Flip Chip and Chip Scale Technology, in order to qualify as chip scale, the CSP package must have an area no greater than 1.2 times than of the die and it must be a single-die, direct surface mountable package. Another criterion that is often applied to qualify these packages as CSPs is their ball pitch should be no more than 1mm.
The concept was first proposed by Junichi Kasai of Fujitsu and Gen Murakami of Hitachi Cable in 1993. The first concept demonstration however came from Mitsubishi Electric.
The die may be mounted on an interposer upon which pads or balls are formed, like with flip chip ball grid array (BGA) packaging, or the pads may be etched or printed directly onto the silicon wafer, resulting in a package very close to the silicon die: such a package is called a wafer-level package (WLP) or a wafer-level chip-scale package (WL-CSP, or WLCSP). WLCSP had been in development since 1990s, and several companies begun volume production in early 2000, such as Advanced Semiconductor Engineering (ASE).
Types
Chip scale packages can be classified into the following groups:
- Customized leadframe-based CSP (LFCSP)
- Flexible substrate-based CSP
- Flip-Chip CSP (FCCSP)
- Rigid substrate-based CSP
- Wafer-level redistribution CSP (WL-CSP)
| Chip-Scale Packages | ||
| Acronym | Full Name | Remark |
| BL | Beam Lead Technology | Bare silicon chip, an early chip-scale package |
| CSP | Chip-scale package | Package size is no more than 1.2x the size of silicon chip |
| TCSP | True chip-side package | Package is same size as silicon |
| TDSP | True die-size package | Same as TCSP |
| WCSP or WL-CSP, or WLCSP | Wafer-level chip-scale package | A WL-CSP or WLCSP package is just a bare die with a redistribution layer (or I/O pitch) to rearrange the pins or contacts on the die so that they can be big enough and have sufficient spacing so that they can be handled just like a BGA package |
| PMCP | Power mount CSP (chip-scale package) | Variant of WLCSP, for power devices like MOSFET. Made by Panasonic. |
| FO-WLCSP | Fan-out wafer-level packaging | Variant of WLCSP. Like a BGA package but with the interposer built atop the die and encapsulated alongside it. |
| eWLB | Embedded wafer level ball grid array | Variation of WLCSP. |
| MICRO SMD | – | Chip-size package (CSP) developed by National Semiconductor |
| COB | Chip-on Board | Bare die supplied without a package. It is mounted directly to the printed circuit board (PCB) or flexible printed circuit (FPC) using bonding wires and covered with a blob of black Epoxy. Also used for LEDs. In LEDs, transparent epoxy or a silicon caulk-like material that may contain a phosphor is poured into a mold containing the LED(s) and cured. The mold forms part of the package. |
| COF | Chip-on-Flex | Variation of COB, where a chip is mounted directly to a flex circuit. Unlike COB, it may not use wires nor be covered with epoxy, using underfill instead. |
| TAB | Tape-automated bonding | Variation of COF, where a flip chip is mounted directly to a flex circuit without the use of bonding wires. Used by LCD driver ICs. |
| COG | Chip-on-Glass | Variation of TAB, where a chip is mounted directly to a piece of glass -typically an LCD. Used by LCD and OLED driver. |