Sequential Lamination is an additive PCB fabrication process of sequentially building up the PCB construction by adding layers of dielectric material and copper. Layers are built upon subcomposites (/subparts), which are structures composed of alternating copper and dielectric levels enclosed by a top and bottom copper layer. This lamination process involves inserting a dielectric between a layer of copper and an already laminated sub-composite.
PCB Sequential Lamination Challenges
- Restriction on the number of cycles: Layer materials are typically limited to four sequential lamination cycles. Beyond four, failure modes, such as delamination and resin cracks may occur.
- Aspect ratio for drill hole equipment: Depending on the type of equipment—typically a drill press or laser drill—used to bore the vias, there are limitations on the number of layers due to the aspect ratio.
- Drill hole alignment when working from Gerber files: When working with Gerber files, there is the possibility of discrepancies or errors that may translate into misalignments on fabricated boards that can increase cost and turnaround times.
- PCB Cost: The repetitive process of sequential lamination can add days or weeks to the board build process, which can significantly increase manufacturing costs.
Sequential lamination is not a new process and there are established best practices to mitigate the challenges listed above. Best practices include reducing layer count, minimizing copper weights, choosing high glass transition temperature (Tg) materials, using thin resin materials next to surface copper layers, back-drilling through-vias to reduce the need for blind and/or buried vias and avoiding ELIC stacked microvias, if possible. Besides design and manufacturing guidelines, technology trends may successfully address some of the sequential lamination challenges.
Many of the issues and potential failure modes of PCB sequential lamination are associated with many layers. Techniques that allow for a reduction in layers are attractive solutions. One such method is the use of embedded components. The idea is to have components installed within the PCB stackup; instead of residing on the top or bottom surface.
Layer reduction is achieved by placing components where they need to be connected. For example, a capacitor can be vertically aligned with electrodes on two adjacent copper layers and eliminate the need for running a via from the surface. At present, most of the work in this area has focused on passive components and flex or rigid-flex board application; however, the prospect of embedded active components and ICs would significantly mitigate the failure modes associated with sequential lamination for large layer counts.
At MADPCB, we are capable of meeting the most complex PCB design requirements coupled with our advanced PCB assembly process.